Excellence in Research and Innovation for Humanity

Yngvar Berg

Publications

5

Publications

5
852
High Speed and Ultra Low-voltage CMOS NAND and NOR Domino Gates
Abstract:

In this paper we ultra low-voltage and high speed CMOS domino logic. For supply voltages below 500mV the delay for a ultra low-voltage NAND2 gate is aproximately 10% of a complementary CMOS inverter. Furthermore, the delay variations due to mismatch is much less than for conventional CMOS. Differential domino gates for AND/NAND and OR/NOR operation are presented.

Keywords:
Low-voltage, high-speed, NAND, NOR, CMOS.
4
5444
Automation of Packing Cell in Fresh Fish Facilities
Abstract:

The problem discussed in this paper involves packing fresh fish fileet of the northern Cod into a standard square container. The fish is first cleaned and split and then collected on a belt ready to be stacked in a container. The aim of our work is to pack the fish into the container with constraints on the amount of overlap allowed for the fileets. The current focus is to design a packing cell that can be real-time and of practical use, while finding the optimal solution to the degree of overlap and minimise the unused space of the container.

Keywords:
Facilities Planning and Management, Intelligent Systems, Manufacturing Systems, Operations Research, Production Planning and Control.
3
8724
Proposal for a Ultra Low Voltage NAND gate to withstand Power Analysis Attacks
Abstract:

In this paper we promote the Ultra Low Voltage (ULV) NAND gate to replace either partly or entirely the encryption block of a design to withstand power analysis attack.

Keywords:
Differential Power Analysis (DPA), Low Voltage (LV), Ultra Low Voltage (ULV), Floating-Gate (FG), supply current analysis.
2
8741
Novel Linear Autozeroing Floating-gate Amplifier for Ultra Low-voltage Applications
Abstract:

In this paper we present a linear autozeroing ultra lowvoltage amplifier. The autozeroing performed by all ULV circuits is important to reduce the impact of noise and especially avoid power supply noise in mixed signal low-voltage CMOS circuits. The simulated data presented is relevant for a 90nm TSMC CMOS process.

Keywords:
Low-voltage, trans conductance amplifier, linearity, floating-gate.
1
10714
A Reversible CMOS AD / DA Converter Implemented with Pseudo Floating-Gate
Abstract:
Reversible logic is becoming more and more prominent as the technology sets higher demands on heat, power, scaling and stability. Reversible gates are able at any time to "undo" the current step or function. Multiple-valued logic has the advantage of transporting and evaluating higher bits each clock cycle than binary. Moreover, we demonstrate in this paper, combining these disciplines we can construct powerful multiple-valued reversible logic structures. In this paper a reversible block implemented by pseudo floatinggate can perform AD-function and a DA-function as its reverse application.
Keywords:
Reversible logic, bi-directional, Pseudo floating-gate(PFG), multiple-valued logic (MVL).