Excellence in Research and Innovation for Humanity

International Science Index

Commenced in January 1999 Frequency: Monthly Edition: International Paper Count: 18

Electrical, Computer, Energetic, Electronic and Communication Engineering

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  • 18
    Power Electronic Solution for High Energetic Efficiency of a Thermo Plant

    In this paper the authors propose a flexible electronic solution, to improve the energetic efficiency of a thermo plant. This is achieved by replacing the mechanical gear box, placed traditionally between a gas turbine and a synchronous generator; by a power electronic converter. After reminding problematic of gear boxes and interest of a proposed electronic solution in high power plants, the authors describe a new control strategy for an indirect frequency converter, which is characterized by its high efficiency due to the use of SWM: Square Wave Modulation. The main advantage of this mode is the quasi absence of switching losses. A control method is also proposed to resolve some problems incurred by using square wave modulation, in particular to reduce the harmonics distortion of the output inverter voltage and current. Simulation examples as well as experimental results are included.

    The Effect of the Direct Contact Heat Exchanger on Steam Power Plant
    An actual power plant, which is the power plant of Iron and Steel Factory at Misurata city in Libya , has been modeled using Matlab in order to compare its results to the actual results of the actual cycle. This paper concentrates on two factors: a- The comparison between exergy losses in the actual cycle and the modeled cycle. b- The effect of extracting pressure on temperature water at boiler inlet. Closed heat exchangers used in this plant have been substituted by open heat exchangers in the current study of the modeled power plant and the required changes in the pressure have been considered. In the following investigation the two points mentioned above are taken in consideration.
    A Comparative Study of Electrical Transport Phenomena in Ultrathin vs. Nanoscale SOI MOSFETs Devices

    Ultrathin (UTD) and Nanoscale (NSD) SOI-MOSFET devices, sharing a similar W/L but with a channel thickness of 46nm and 1.6nm respectively, were fabricated using a selective “gate recessed” process on the same silicon wafer. The electrical transport characterization at room temperature has shown a large difference between the two kinds of devices and has been interpreted in terms of a huge unexpected series resistance. Electrical characteristics of the Nanoscale device, taken in the linear region, can be analytically derived from the ultrathin device ones. A comparison of the structure and composition of the layers, using advanced techniques such as Focused Ion Beam (FIB) and High Resolution TEM (HRTEM) coupled with Energy Dispersive X-ray Spectroscopy (EDS), contributes an explanation as to the difference of transport between the devices.

    Model of Controled Six Phase Induction Motor
    In this paper, the authors take a look at advantages of multiphase induction motors comparing them with three phase ones and present the applications where six-phase induction motors are used. They elaborate the mathematical model of six-phase induction motor with two similar stator three phase winding, shifted by 30 degrees in space and three phase winding in rotor, in synchronous reference frame for soft starting and scalar control. The authors simulate and discuss results of speed and torque starting transients.
    Fiber Lens Structure for Large Distance Measurement
    We propose a new fiber lens structure for large distance measurement in which a polymer layer is added to a conventional fiber lens. The proposed fiber lens can adjust the working distance by properly choosing the refractive index and thickness of the polymer layer. In our numerical analysis for the fiber lens radius of 120 μm, the working distance of the proposed fiber lens is about 10 mm which is about 30 times larger than conventional fiber lens.
    Analysis and Design of a Novel Active Soft Switched Phase-Shifted Full Bridge Converter
    This paper proposes an active soft-switching circuit for bridge converters aiming to improve the power conversion efficiency. The proposed circuit achieves loss-less switching for both main and auxiliary switches without increasing the main switch current/voltage rating. A winding coupled to the primary of power transformer ensures ZCS for the auxiliary switches during their turn-off. A 350 W, 100 kHz phase shifted full bridge (PSFB) converter is built to validate the analysis and design. Theoretical loss calculations for proposed circuit is presented. The proposed circuit is compared with passive soft switched PSFB in terms of efficiency and loss in duty cycle.
    Soil Resistivity Structure and Its Implication on the Pole Grid Resistance for Transmission Lines
    High Voltage (HV) transmission lines are widely spread around residential places. They take all forms of shapes: concrete, steel, and timber poles. Earth grid always form part of the HV transmission structure, whereat soil resistivity value is one of the main inputs when it comes to determining the earth grid requirements. In this paper, the soil structure and its implication on the electrode resistance of HV transmission poles will be explored. In Addition, this paper will present simulation for various soil structures using IEEE and Australian standards to verify the computation with CDEGS software. Furthermore, the split factor behavior under different soil resistivity structure will be presented using CDEGS simulations.
    Advanced ILQ Control for Buck-Converter viaTwo-Degrees of Freedom Servo-System

    In this paper, we propose an advanced ILQ control for the buck-converter via two-degrees of freedom servo-system. Our presented strategy is based on Inverse Linear Quadratic (ILQ) servo-system controller without solving Riccati-s equation directly. The optimal controller of the current and voltage control system is designed. The stability and robust control are analyzed. A conscious and persistent effort has been made to improve ILQ control via two-degrees of freedom guarantees the optimal gains on the basis of polynomial pole assignment, which our results of the proposed strategy shows that the advanced ILQ control can be controlled independently the step response and the disturbance response by appending a feed-forward compensator.

    Implementation and Comparison between Two Algorithms of Three-Level Neutral Point Clamped Voltage Source Inverter
    This paper presents a comparison between two Pulse Width Modulation (PWM) algorithms applied to a three-level Neutral Point Clamped (NPC) Voltage Source Inverter (VSI). The first algorithm applied is the triangular-sinusoidal strategy; the second is the Space Vector Pulse Width Modulation (SVPWM) strategy. In the first part, we present a topology of three-level NCP VSI. After that, we develop the two PWM strategies to control this converter. At the end the experimental results are presented.
    Soil Resistivity Data Computations; Single and Two - Layer Soil Resistivity Structure and Its Implication on Earthing Design
    Performing High Voltage (HV) tasks with a multi craft work force create a special set of safety circumstances. This paper aims to present vital information relating to when it is acceptable to use a single or a two-layer soil structure. Also it discusses the implication of the high voltage infrastructure on the earth grid and the safety of this implication under a single or a two-layer soil structure. A multiple case study is investigated to show the importance of using the right soil resistivity structure during the earthing system design.
    Optimized Multiplier Based upon 6-Input Luts and Vedic Mathematics

    A new approach has been used for optimized design of multipliers based upon the concepts of Vedic mathematics. The design has been targeted to state-of-the art field-programmable gate arrays (FPGAs). The multiplier generates partial products using Vedic mathematics method by employing basic 4x4 multipliers designed by exploiting 6-input LUTs and multiplexers in the same slices resulting in drastic reduction in area. The multiplier is realized on Xilinx FPGAs using devices Virtex-5 and Virtex-6.Carry Chain Adder was employed to obtain final products. The performance of the proposed multiplier was examined and compared to well-known multipliers such as Booth, Carry Save, Carry ripple, and array multipliers. It is demonstrated that the proposed multiplier is superior in terms of speed as well as power consumption.

    FPGA Hardware Implementation and Evaluation of a Micro-Network Architecture for Multi-Core Systems

    This paper presents the design, implementation and evaluation of a micro-network, or Network-on-Chip (NoC), based on a generic pipeline router architecture. The router is designed to efficiently support traffic generated by multimedia applications on embedded multi-core systems. It employs a simplest routing mechanism and implements the round-robin scheduling strategy to resolve output port contentions and minimize latency. A virtual channel flow control is applied to avoid the head-of-line blocking problem and enhance performance in the NoC. The hardware design of the router architecture has been implemented at the register transfer level; its functionality is evaluated in the case of the two dimensional Mesh/Torus topology, and performance results are derived from ModelSim simulator and Xilinx ISE 9.2i synthesis tool. An example of a multi-core image processing system utilizing the NoC structure has been implemented and validated to demonstrate the capability of the proposed micro-network architecture. To reduce complexity of the image compression and decompression architecture, the system use image processing algorithm based on classical discrete cosine transform with an efficient zonal processing approach. The experimental results have confirmed that both the proposed image compression scheme and NoC architecture can achieve a reasonable image quality with lower processing time.

    Two Active Elements Based All-Pass Section Suited for Current-Mode Cascading

    A new circuit topology realizing a first-order currentmode all-pass filter is proposed using two dual-output second generation current conveyor and two passive components. The circuit possesses low-input and high-output impedance, which makes it ideal for current-mode systems. The proposed circuit is verified through PSPICE simulation results.

    Simulation as an Effective Tool for the Comparative Evaluation of Field Oriented Control and Direct Torque Control of Induction Motor

    This paper presents a comparative study of two most popular control strategies for Induction motor (IM) drives: Field-Oriented Control (FOC) and Direct Torque Control (DTC). The comparison is based on various criteria including basic control characteristics, dynamic performance, and implementation complexity. The study is done by simulation using the Simulink Power System Block set that allows a complete representation of the power section (inverter and IM) and the control system.

    Emergency Generator Sizing and Motor Starting Analysis

    This paper investigates the preliminary sizing of generator set to design electrical system at the early phase of a project, dynamic behavior of generator-unit, as well as induction motors, during start-up of the induction motor drives fed from emergency generator unit. The information in this paper simplifies generator set selection and eliminates common errors in selection. It covers load estimation, step loading capacity test, transient analysis for the emergency generator set. The dynamic behavior of the generator-unit, power, power factor, voltage, during Direct-on-Line start-up of the induction motor drives fed from stand alone gene-set is also discussed. It is important to ensure that plant generators operate safely and consistently, power system studies are required at the planning and conceptual design stage of the project. The most widely recognized and studied effect of motor starting is the voltage dip that is experienced throughout an industrial power system as the direct online result of starting large motors. Generator step loading capability and transient voltage dip during starting of largest motor is ensured with the help of Electrical Transient Analyzer Program (ETAP).

    Reduction of Leakage Power in Digital Logic Circuits Using Stacking Technique in 45 Nanometer Regime

    Power dissipation due to leakage current in the digital circuits is a biggest factor which is considered specially while designing nanoscale circuits. This paper is exploring the ideas of reducing leakage current in static CMOS circuits by stacking the transistors in increasing numbers. Clearly it means that the stacking of OFF transistors in large numbers result a significant reduction in power dissipation. Increase in source voltage of NMOS transistor minimizes the leakage current. Thus stacking technique makes circuit with minimum power dissipation losses due to leakage current. Also some of digital circuits such as full adder, D flip flop and 6T SRAM have been simulated in this paper, with the application of reduction technique on ‘cadence virtuoso tool’ using specter at 45nm technology with supply voltage 0.7V.

    Low Value Capacitance Measurement System with Adjustable Lead Capacitance Compensation

    The present paper describes the development of a low cost, highly accurate low capacitance measurement system that can be used over a range of 0 – 400 pF with a resolution of 1 pF. The range of capacitance may be easily altered by a simple resistance or capacitance variation of the measurement circuit. This capacitance measurement system uses quad two-input NAND Schmitt trigger circuit CD4093B with hysteresis for the measurement and this system is integrated with PIC 18F2550 microcontroller for data acquisition purpose. The microcontroller interacts with software developed in the PC end through USB architecture and an attractive graphical user interface (GUI) based system is developed in the PC end to provide the user with real time, online display of capacitance under measurement. The system uses a differential mode of capacitance measurement, with reference to a trimmer capacitance, that effectively compensates lead capacitances, a notorious error encountered in usual low capacitance measurements. The hysteresis provided in the Schmitt-trigger circuits enable reliable operation of the system by greatly minimizing the possibility of false triggering because of stray interferences, usually regarded as another source of significant error. The real life testing of the proposed system showed that our measurements could produce highly accurate capacitance measurements, when compared to cutting edge, high end digital capacitance meters.

    Static and Dynamic Characteristics of an Appropriated and Recessed n-GaN/AlGaN/GaN HEMT

    The objective of this paper is to simulate static I-V and dynamic characteristics of an appropriated and recessed n-GaN/AlxGa1-xN/GaN high electron mobility (HEMT). Using SILVACO TCAD device simulation, and optimized technological parameters; we calculate the drain-source current (lDS) as a function of the drain-source voltage (VDS) for different values ​​of the gate-source voltage (VGS), and the drain-source current (lDS) depending on the gate-source voltage (VGS) for a drain-source voltage (VDS) of 20 V, for various temperatures. Then, we calculate the cut-off frequency and the maximum oscillation frequency for different temperatures.

    We obtain a high drain-current equal to 60 mA, a low knee voltage (Vknee) of 2 V, a high pinch-off voltage (VGS0) of 53.5 V, a transconductance greater than 600 mS/mm, a cut-off frequency (fT) of about 330 GHz, and a maximum oscillation frequency (fmax) of about 1 THz.